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Specific notes for Nordic Semiconductor's chips

nRF5 SDK

Mira is built with nRF5 SDK v17.1.0

Access port protection controlled by hardware and software

Starting with nRF52832 revision 3, nRF52833 revision 2 and nRF52840 revision 3, the CTRL-AP access is partly disabled when the MCU starts. To be able to program it, unlock it with a chip erase (for example via nrfjprog --recover). After a reset or power cycle the chip will lock again.

To keep the CTRL-AP access enabled for debugging, reprogramming etc, MiraOS can be configured to unlock it during startup. Add:

APPROTECT_DISABLED=yes
to the make file to enable debugging/programming of the device. If it is not defined, or defined as something else, MiraOS will properly lock the CTRL-AP port with APPROTECT according to Nordic Semiconductor's errata 249.

This only works with the provided make files and isr_vector.c files. With custom make files, set MIRA_NRF_APPROTECT_DISABLE to 1 before compiling MiraOS's isr_vector.c.

SoftDevice

Mira is only available with SoftDevice. The version used is 7.2.0

MiraOS handles the start of SoftDevice, as well as all radio events. BLE events are provided by a MiraOS API, see concurrent Bluetooth.

Access SoC events through the Nordic Semiconductor's SDK, see nrf_sdh_soc.h file.

With MiraMesh, the firmware should start SoftDevice before MiraMesh and route SoftDevice events to MiraMesh, see here.

MiraOS Example

    #include "nrf_sdh_soc.h"

    static void evt_receiver(uint32_t evt_id, void *p_context)
    {
        // Handle events here
    }

    NRF_SDH_SOC_OBSERVER(m_sd_evt_receiver, 0, evt_receiver, &ctx);

Build without SoftDevice image

Firmware files include the SoftDevice image by default when building for a SoftDevice target of the form “nrf52*ble-os”. To remove the SoftDevice from the generated firmware file, add a file called nrf_mbr_sd.c with the following content:

__attribute__((section(".nrf_mbr_sd")))
int nrf_mbr_sd[0];

This is useful to speed up flashing during development and to reduce the image needed to transfer with FOTA for updates. Please note that future versions of MiraOS might depend on different Softdevice versions (or none) so any FOTA mechanism also need to support for a way to update the Softdevice.

Changing default reset pin

The reset pin is set to the default pins at startup by the MDK if the PSELRESET[n](n=0..1) registers is set to 0xFFFFFFF.

The change of the reset pin can be done in two ways.

Note: In both cases, it is important that both register contains the same value for it to take effect.

nrfjprog

By writing the desired value to the PSELRESET[n](n=0..1) registers in the UICR with nrfjprog.

nrfjprog -s <serial_number> --memwr 0x10001200 --val <value>
nrfjprog -s <serial_number> --memwr 0x10001204 --val <value>

Linkscript

It is possible to automate this at flashing by adding the appropriate memory region and section to the linkscript.

MEMORY
{
    UICR_PSELRESET (r) : ORIGIN = 0x10001200, length 0x8
}
SECTIONS {
    . = ALIGN(4);
        .uicr_pselreset :
        {
            KEEP(*(SORT(.uicr_pselreset*)))
        } > UICR_PSELRESET
}
And somewhere in code add:
#define PSELRESET_VALUE <value>
uint32_t const uicr_pselreset[2]
    __attribute__ ((section(".uicr_pselreset")))
    __attribute__ ((used)) = {PSELRESET_VALUE, PSELRESET_VALUE};

ABI

  • Mira < 2.4.0 uses the ARM VFP ABI (-mfloat-abi=hard).
  • Mira 2.4.x uses the ARM EABI ABI (-mfloat-abi=soft).
  • Mira >= 2.5.0 will use the VFP ABI again.

For MiraOS 2.4.x, the FPU is turned off by default.

To use hardware floating point, use the -mfloat-abi=softfp flag to gcc and turn on the FPU during startup:

    SCB->CPACR |= (3UL << 20) | (3UL << 22);

Please read ARM's documentation about the CPACR register.

Note that GCC has had bugs when mixing soft and softfp flags in a project so not all versions work.

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